The present invention relates to a SAW (Surface Acoustic Wave) device or the like electronic component that houses electronic device chip in the package. The present invention relates also to a method for manufacturing the electronic components.
FIG. 5 shows a plan view of a conventional SAW device, while FIG. 6 shows the cross sectional view. As shown in these drawings, a conventional SAW device is manufactured by first stacking a first ceramic frame body 101 on one of the surfaces of a ceramic substrate 100, and a second ceramic frame body 102 on the first ceramic frame body 101, and these frame bodies together with the substrate are fired to form an integrated package 103. An internal contact electrode 104 and a shield electrode 105 are formed on certain predetermined areas of the package 103, and a seam ring 110 is provided on the upper-end surface of the package by means of silver brazing. And then, the internal contact electrode 104, the shield electrode 105 and the seam ring 110 are gold plated on the surface.
A SAW chip 107 is comprised of comb-formed electrodes for input/output formed on a piezoelectric substrate (not shown), and reflector electrodes and contact electrodes coupled with the comb-formed electrodes provided at both sides of the comb-formed electrode. The SAW chip 107 is mounted on the bottom surface of a cavity of the package 103; namely, it is mounted on the shield electrode 105 provided on the surface of ceramic substrate 100, with an adhesion layer 106 interposed in between. Next, a pattern recognition is conducted from above the package 103, namely from the seam ring 110 side towards the SAW chip 107, for detecting boundaries between the second ceramic frame body 102 and the first ceramic frame body 101, and between the internal contact electrode 104 and a non-internal contact electrode portion 108a, 108b. 
A location for bonding a wire 109 on the internal contact electrode 104 is determined based on the two boundaries detected through the above procedure as well as the dimensional particulars of the package 103.
In accordance with the location determined as above, the SAW chip 107 and the internal contact electrode 104 are interconnected by the wire 109, and then a lid 111 is welded on the seam ring 110 of package 103.
In the above-described conventional technology, however, it is extremely difficult to establish the location at a high accuracy level, because of a displacement which occurs when silver-brazing the seam ring 110.
If a location thus determined is not accurate enough, the wire 109, for example, could be connected erroneously with the shield electrode 105, or an defective connection between the wire 109 and the internal contact electrode 104 might arise.
The present invention aims to offer an electronic component, in which an electronic device chip can be aligned to a certain specific location at a high accuracy level and an accurate location is established at a high accuracy level for bonding a wire on the internal contact electrode. A method for manufacturing the electronic components is also offered by the present invention.
The outline structure of an electronic component of the present invention is that it is provided with a pattern suitable for aligning a SAW device chip or the like electronic device chip and an interconnection wire accurately to certain specified places of a package of the electronic component.
The outline of a method for manufacturing the electronic components of the present invention is that the package is provided with a stepped level-difference on the inner wall of cavity, and aligning of at least either said device chip or interconnection wire to a certain specified location is effected after detecting the boundary formed by the stepped level-difference and the inner bottom surface of said package at a high accuracy level.
Practically described, an electronic component of the present invention comprises a package, which having a cavity formed within and the cavity is provided with a stepped level-difference on the inner wall surface; an internal contact electrode provided on the upper end-surface of said stepped level-difference of the inner wall; a shield electrode; provided on the inner bottom surface of said package; a device chip disposed on the shield electrode; and an interconnection wire for connecting the device chip with said internal contact electrode. Said inner bottom surface is provided with a non-electrode portion, which region is used for aligning at least either said device chip or said interconnection wire to a certain specific location. Said non-electrode portion can be used as a recognition pattern for aligning at least either the device chip or the interconnection wire to a certain specific location in the package. Since the non-electrode portion is different in color from the shield electrode formed on the inner bottom surface of the package, a place for mounting the device chip and a spot for bonding the interconnection wire on the internal contact electrode can be determined accurately by making use of the non-electrode portion.
Another electronic component of the present invention comprises a ceramic substrate; a first ceramic frame body formed on one of the surfaces of said ceramic substrate; a second ceramic frame body formed on said first ceramic frame body; stepped level-differences formed between said ceramic substrate and said first ceramic frame body and between said first ceramic frame body and said second ceramic frame body; an internal contact electrode formed on one of the surfaces of said first ceramic frame body, which surface being in the same side as a junction formed between said first ceramic frame body and said second ceramic frame body, which internal contact electrode extending over the side faces of said first ceramic frame body and said ceramic substrate as far as the other surface of said ceramic substrate; a shield electrode formed on the one surface of said ceramic substrate for having said device chip thereon, and said device chip is mounted on said shield electrode; and an interconnection wire for connecting said device chip with said internal contact electrode. The inner bottom surface of said package is provided with a non-electrode portion, which region is used for aligning at least either said device chip or said interconnection wire to a certain specific location. As already described above, the non-electrode portion may be considered as a recognition pattern for aligning at least either the device chip or the interconnection wire to a certain specific location. Thus a place for mounting the device chip and a spot for bonding the interconnection wire on the internal contact electrode can be determined at a high accuracy level.
Other features of the electronic component of the present invention include that it is provided with said non-electrode portion for at least two, said device chip is disposed on said shield electrode at an area that is specified by connecting said two non-electrode portions. When viewed from above the package, one of the sides of said non-electrode portion is coincidental with one of the sides of said internal contact electrode. Furthermore, one of the sides of said internal contact electrode, or the extension, is crossing substantially at a right angle with one of the sides of said non-electrode portion, or the extension. The clearance formed between the opposing inner walls of a package is greater at the lower stepped level-difference than at the upper stepped level-difference. In the electronic component of the present invention, a place for mounting the device chip and a spot for bonding the interconnection wire on the internal contact electrode can be determined at a higher accuracy level by taking advantage of the above-described features. In the electronic component of the present invention, the upper surfaces of the internal contact electrode and the device chip are disposed on substantially the same plane. With such configuration, both of the internal contact electrode and the device chip are brought into the focused zone together during the pattern recognition. This contributes to determining the bonding location of the interconnection wire on the internal contact electrode at a higher accuracy level.
Further, in the electronic component of the present invention, the length, in the direction from the internal contact electrode to the device chip, of a side of the non-shielded electrode portion is greater than the focus displacement margin of a lens used for recognizing said boundary formed by the internal contact electrode and the non-electrode portion. With the above configuration, boundary between the internal contact electrode and the non-electrode portion can be recognized at a high precision level. Furthermore, a side of the non-shielded electrode portion facing the internal contact electrode is longer than the gap between said internal contact electrodes. With the above configuration, boundary between the internal contact electrode and the shield electrode can be recognized at a high reliability level, even if there happens a displacement with the non-shielded electrode portion.
A method for manufacturing the electronic components in accordance with the present invention comprises a first step for mounting a device chip in a package, which package having a cavity provided with stepped level-differences opposing to each other on the inner wall surface and a plurality of internal contact electrodes on the upper-end surface of said stepped level-difference; a second step for detecting a boundary formed by said stepped level-difference and the inner bottom surface of said package, as viewed from the above, for at least two, and determining spots for coupling said internal contact electrode with said device chip by means of the interconnection wire, based on results of the detection; a third step for electrically connecting said device chip with said internal contact electrode using said interconnection wire; and a fourth step for sealing said package with a lid at the opening. In accordance with the above-described method of manufacture, the internal contact electrode and the device chip can be connected reliably with the interconnection wire.
Further, in a method for manufacturing the electronic components in accordance with the present invention, the package of which having a shield electrode at the inner bottom surface and the inner bottom surface of the package, when viewed from the above, is provided with a non-shielded electrode portion in a zone facing said stepped level-difference, a spot for bonding the interconnection wire is determined after detecting, in the first step, a boundary formed by said non-shielded electrode portion and said stepped level-difference for at least two. In accordance with this method of manufacture, spots for bonding the interconnection wire on the internal contact electrode and the device chip can be determined, more accurately.
A method for manufacturing the electronic components in accordance with the present invention, the package of which having a cavity provided with stepped level-differences opposing to each other on the inner wall surface and a plurality of internal contact electrodes on the upper-end surface of said stepped level-difference, comprises a first step for determining a place for mounting a device chip after detecting a boundary formed by said stepped level-difference and the inner bottom surface, as viewed from the above, for at least two; a second step for mounting said device chip in said package at the inner bottom; a third step for electrically interconnecting said device chip and said internal contact electrode with the interconnection wire; and a fourth step for sealing said package with a lid at the opening. In accordance with the above-described method of manufacture, a device chip can be mounted in a package at a high reliably level.
Furthermore, a method for manufacturing the electronic components in accordance with the present invention, whose package having a shield electrode formed on the inner bottom surface and provided with a non-shielded electrode portion on said inner bottom surface at the end facing said internal contact electrode, determines a place for mounting a device chip, as viewed from the above in the first step, after detecting a cross point formed by one of the sides of said, or the extension, and one of the sides of said internal contact electrode, or the extension, for at least two. In accordance with the method, a device chip can be mounted in a package in a more reliable manner.
A method for manufacturing the electronic components in accordance with the present invention, whose package having a cavity provided with opposing stepped level-differences on the inner wall surface and provided internal contact electrode on the upper end-surface of said stepped level-difference, comprises a first step for determining a place for mounting the device chip in the package after detecting, as viewed from above the package, said boundary formed by the stepped level-difference and the inner bottom surface for at least two, a second step for mounting said device chip in said package, a third step for determining spots for interconnecting said internal contact electrode and said device chip with the interconnection wire after detecting, as viewed from above the package, said boundary formed by the stepped level-difference and the inner bottom surface for at least two, a fourth step for electrically interconnecting said device chip and said internal contact electrode with the interconnection wire, and a fifth step for sealing said package at the opening with a lid. In accordance with the above-described method of manufacture, a device chip can be mounted in a package and the device chip and the internal contact electrode can be interconnected with an interconnection wire at a higher reliability level.
Furthermore, in a method for manufacturing the electronic components in accordance with the present invention, the package of which having a shield electrode on the inner bottom surface and provided with a non-shielded electrode portion on the inner bottom surface at a side facing the internal contact electrode, a place for mounting the device chip is determined after detecting, in the first step, a cross point formed by one of the sides of said non-shielded electrode portion, or the extension, and one of the sides of said internal contact electrode, or the extension, for at least two, and spots for bonding the interconnection wire are determined, in the third step, after detecting a cross point formed by one of the sides of said non-shielded electrode portion, or the extension, and one of the sides of said internal contact electrode, or the extension, for at least two. In accordance with the above-described method of manufacture, a device chip can be mounted in a package and the device chip and the internal contact electrode can be interconnected with an interconnection wire at a higher reliability level.